Not to appear picky but I think this needs to be clarified a bit. USB uses synchronous (request-response) wire protocol and one side is always requesting, another responding - hence master and slave. This is not runtime configurable/negotiatable.

Traditionally USB transceivers were designed as either master or slave (host/peripheral), though with the rise of smart peripherals (embedded/mobile devices) came need for both in one device. Manufacturers could design product with 2 different USB transceivers or use one that is configurable to either master or slave.

If you examine any mini/micro USB port/plug you will find 5 pins, and 4 pins on a large (both A and B). That extra pin is actually a toggle for OTG transceiver mode. Of course manufacturers can decide to internally wire transceiver to any mode and expose only data/power pins, but that does not stop transceiver from being OTG. Exactly this is done in top Android tables from mentioned site - they have nVidia Tegra SoC which actually uses OTG transceivers.

I am not intimate with PC hardware (would expect master-only transceivers), but, as I have said before, all embedded SoCs I have laid my hands on (not too many) used either slave-only or OTG transceivers.