A very simple example is user input and output: I want to print the prompt text before I let the user type their input.
The same is true for plenty of other hardware: I need to move the robot forward before I turn on the drill; I need to print page 1 before page 2 - etc etc. There are plenty of inherently sequential operations, thats all I was trying to say. ;-)
But you are not incorrect - obviously there IS some hardware which is only sequential because it was designed for von Neumann machines to drive it.
Dataflow hardware can exist (there are, or were, dataflow processors made) and hardware itself is inherently dataflow. In fact, VHDL and Verilog are inherently dataflow languages (possibly) running on FPGAs, which I guess could be seen as a sort of low level dataflow processor.
EDIT: @scott_s: Sure, but the end effect is the same, isn't it?
I think it's inaccurate to characterize VHDL and Verilog as "languages running on FPGAs." FGPAs aren't designed in anyway to run those languages; they're designed to emulate hardware. Since those are the languages used to describe hardware - including modern processors - what they produce can be mapped to run on an FPGA.
dkersten, indeed, the effect is the same. But this is a good discussion, and I wanted to make sure we all had the facts right.
Meta talk: responding to my post instead of editing yours makes more sense to me. First, I'm more likely to see it, and second, now I'm in the awkward position of replying to myself. I also find it disheartening that someone downmodded your comment from 2 to 1, presumably because I corrected you, but probably unaware that I was the one who upmodded you to begin with. Your point was valid, I just wanted the record to be accurate.
I'm glad that you are correcting me. I like to be corrected, because it means that I'm not relying on invalid information and I very much like learning new things, especially if related to something which interests me - like dataflow.
Sorry, HN wouldn't allow me to reply to your comment for some reason, so I edited mine.
PG recently implemented a brief "cooling off" period for comments, where there was no reply link. The purpose was to prevent long, nit-picking back-and-forths.
A very simple example is user input and output: I want to print the prompt text before I let the user type their input.
The same is true for plenty of other hardware: I need to move the robot forward before I turn on the drill; I need to print page 1 before page 2 - etc etc. There are plenty of inherently sequential operations, thats all I was trying to say. ;-)
But you are not incorrect - obviously there IS some hardware which is only sequential because it was designed for von Neumann machines to drive it.
Dataflow hardware can exist (there are, or were, dataflow processors made) and hardware itself is inherently dataflow. In fact, VHDL and Verilog are inherently dataflow languages (possibly) running on FPGAs, which I guess could be seen as a sort of low level dataflow processor.
EDIT: @scott_s: Sure, but the end effect is the same, isn't it?