One of the reasons that Intel only shipped 5% incremental updates was AMD was basically non-existent due to both Intel pressuring them and AMD has done a massive mistake with bulldozer/piledriver architecture.
They vastly underestimated how much a single FPU would be bottleneck on a multicore/SMP processor.
Then AMD took things personal and architected Zen/EPYC. The rest is history.
Certainly, and by that time Intel just sort of dropped all the balls. They were already struggling to do die shrinks and it seems like they simply lost all their ability to develop the architecture.
That had maybe happened years earlier. The thing about Conroe is, IIRC, its ancestry came from the P3 and Intel's mobile CPU designs. P4 was steady evolutions on the Netburst architecture. The years of improvements to conroe were mostly just incremental changes and porting over features from Netburst (such as hyperthreading). Once that all played out, intel really didn't have anywhere else to go or plans on how to evolve the architecture. They fell back on the same old "let's just add wider SIMD instructions (AVX)".
I also seem to recall that intel made fab bets that ultimately didn't pay off. Again, IIRC, I believe they were trying to use the same light lithography (230nm light?) rather than going into UV lithography. That caused them to dump a fair bit of money fabrication that never really paid off.
They vastly underestimated how much a single FPU would be bottleneck on a multicore/SMP processor.
Then AMD took things personal and architected Zen/EPYC. The rest is history.