the biggest omission is that they cut it down from 28 to 21 i/o pins and eliminated interrupts, which would be a big loss in a modern microcontroller, but it was nmos rather than cmos, so you're looking at unholy power consumption anyway; 40 milliamps (typ., p. 192/478 (6-49)) at 5 volts is 200 milliwatts. but they also cut the clock speed, the minimal machine cycle time on the 8021 is listed as 10 μs (with a 3 megahertz crystal) rather than the 8048's 2.5μs or the 8049's 1.36μs. so you get 0.07 8-bit mips. it uses dynamic logic and dynamic ram to save space so you can't clock it at less than 20% of that, so you can't do low-power sleep, ever
they also omitted the subtract instruction, which the 8048 doesn't have either. i guess you can use cpl, inc, add. (i see that what the manual suggests is cpl, add, cpl.) there's enough space for multiply and divide subroutines but they ain't gonna be fast
also, you can forget about programming an 8021's program memory. it's mask-programmable only; you have to do your test programming on an 8748 before you place your order with intel for a batch of 8021s with a custom silicon mask encoding your 1024 bytes of already tested and debugged firmware. so those 42-cent∆ prices were necessarily in rather large batches. the 8051 and 8048/8049 had an 'ea' pin you can pull high to get it to execute code from external memory instead, but i don't think the 8021 did; the manual says, "no external rom expansion capability is provided."
0.07 8-bit mips is about 0.005 dhrystone mips, although i think the 8021 is too small to run dhrystone. the cypress chip i linked above is about 60 dhrystone mips at 48 megahertz, so about 12000 times faster, for about a 25× lower price. it also has 4096 bytes of ram instead of 64 (16×), 32 kibibytes of nonvolatile program memory instead of 1 (32×), plus 8 kibibytes of rom, and you can program the flash in-application (i.e., under the control of the program it's running). it has a hardware multiplier, which is about a 10× additional speedup for dsp type stuff. in deep sleep it uses 2.5μamps. at full speed it's a bit of a power hog by current standards, slurping a hefty 13 milliamps (at 1.8 volts if you like, so 23 milliwatts, almost ⅛ the 8021, but if you're in deep sleep most of the time you can go another 5000× lower). and it's 1.6mm×2mm. and you can program it in c. it has only 9 gpio pins, though!
despite nominally being a psoc the cypress chip has no analog peripherals, not even a comparator. it does have internal oscillators (with no external components), pwm generation, i2c, spi, uart, and quadrature input, and its gpio pins have seven drive strength modes
so depending on whether cpu speed or memory space is the bigger bottleneck for your application, price/performance has improved between 400× and 300000× since the 8021. for things that were constrained by battery life or reprogrammability, the difference isn't quantitative, it's just that the 8021 couldn't do the job at all
in the metric of interest to hopper, though, which was computers per buck rather than mips per buck, it's only about 25× better than then
https://en.m.wikipedia.org/wiki/Intel_MCS-48 says it's a cut-down 8048. the 8048 itself has a max clock speed 11 megahertz, 15 clocks per machine cycle, with about 70% of instructions taking one machine cycle, 30% taking two, for about half a mip. not vax mips, tho, an 8-bit mip. there's a manual for the chip family at https://manualsdump.com/en/download/manuals/intel-mcs-48/253...
the biggest omission is that they cut it down from 28 to 21 i/o pins and eliminated interrupts, which would be a big loss in a modern microcontroller, but it was nmos rather than cmos, so you're looking at unholy power consumption anyway; 40 milliamps (typ., p. 192/478 (6-49)) at 5 volts is 200 milliwatts. but they also cut the clock speed, the minimal machine cycle time on the 8021 is listed as 10 μs (with a 3 megahertz crystal) rather than the 8048's 2.5μs or the 8049's 1.36μs. so you get 0.07 8-bit mips. it uses dynamic logic and dynamic ram to save space so you can't clock it at less than 20% of that, so you can't do low-power sleep, ever
they also omitted the subtract instruction, which the 8048 doesn't have either. i guess you can use cpl, inc, add. (i see that what the manual suggests is cpl, add, cpl.) there's enough space for multiply and divide subroutines but they ain't gonna be fast
also, you can forget about programming an 8021's program memory. it's mask-programmable only; you have to do your test programming on an 8748 before you place your order with intel for a batch of 8021s with a custom silicon mask encoding your 1024 bytes of already tested and debugged firmware. so those 42-cent∆ prices were necessarily in rather large batches. the 8051 and 8048/8049 had an 'ea' pin you can pull high to get it to execute code from external memory instead, but i don't think the 8021 did; the manual says, "no external rom expansion capability is provided."
0.07 8-bit mips is about 0.005 dhrystone mips, although i think the 8021 is too small to run dhrystone. the cypress chip i linked above is about 60 dhrystone mips at 48 megahertz, so about 12000 times faster, for about a 25× lower price. it also has 4096 bytes of ram instead of 64 (16×), 32 kibibytes of nonvolatile program memory instead of 1 (32×), plus 8 kibibytes of rom, and you can program the flash in-application (i.e., under the control of the program it's running). it has a hardware multiplier, which is about a 10× additional speedup for dsp type stuff. in deep sleep it uses 2.5μamps. at full speed it's a bit of a power hog by current standards, slurping a hefty 13 milliamps (at 1.8 volts if you like, so 23 milliwatts, almost ⅛ the 8021, but if you're in deep sleep most of the time you can go another 5000× lower). and it's 1.6mm×2mm. and you can program it in c. it has only 9 gpio pins, though!
despite nominally being a psoc the cypress chip has no analog peripherals, not even a comparator. it does have internal oscillators (with no external components), pwm generation, i2c, spi, uart, and quadrature input, and its gpio pins have seven drive strength modes
so depending on whether cpu speed or memory space is the bigger bottleneck for your application, price/performance has improved between 400× and 300000× since the 8021. for things that were constrained by battery life or reprogrammability, the difference isn't quantitative, it's just that the 8021 couldn't do the job at all
in the metric of interest to hopper, though, which was computers per buck rather than mips per buck, it's only about 25× better than then
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∆ https://data.bls.gov/cgi-bin/cpicalc.pl?cost1=.13&year1=1982... says 42¢