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The M2 series does not support CXL, as far as I know.

They would presumably use UDIMMs anyway, so maybe there is theoretically space?

Still, that would be one heck of a socket/motherboard. I can't imagine how many motherboard layers and socket pins they would need for 16+ channel DDR5 in such a tiny space... If its even possible to manufacture, it would be hilariously expensive.



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