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Isn't ARM a RISC? So no, far from dead, RISC is already hugely successful.


ARM, MIPS, Power are all RISC. The only real CISC processor in mainstream usage seems to be the PICO, and of course, the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them.


>the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them.

CISC or RISC is a characteristic of the ISA.

Usage of microops doesn't change the ISA. It is an opaque microarchitecture artifact.


This is a lost battle. People don't even remember what the word ISA means. It is an external interface. Whatever happens inside the professor has nothing to do with interfaces. You can run x86 code on Arm Mac's, does that mean they are a x86 processor that is internally implemented with RISC? If yes then the word has lost it's meaning. If no then you would have to explain why these are distinct cases.


Some argue it has actually become a CISC (special instructions for JavaScript and so on), but I don't know how RISC-V compares.


RISC is not about the number of instructions but rather what the instructions do. The famous example of CISC gone to its logical extreme is the VAX's polynomial multiply instruction, which ended up being almost a full program in a single instruction. RISC tends to go the other way, focusing on things that are easy for hardware to do and leaving anything else to software.


ARM's JavaScript instruction is actually a pretty good example of RISC philosophy. The instruction is a single cycle floating point conversion to integer using x86 abi default rounding modes rather than the rounding modes in the flag register. It's a great example of the RISC filtration test of 'what's a single cycle instruction that can be noticed in instruction traces as something that will give an actual perf improvement'.




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