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Using Common Lisp to generate VHDL for ultra-lowlatency FPGAs
(
lisp-univ-etc.blogspot.com
)
4 points
by
medo-bear
on July 22, 2022
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1 comment
medo-bear
on July 22, 2022
[–]
also see
https://github.com/mbattyani/sub-25-ns-nasdaq-itch-fpga-pars...
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