Hacker Newsnew | past | comments | ask | show | jobs | submitlogin

Technical management failure in how to mitigate late or stalled deps, fallback should have been to add ddr4 modems to existing chips.


That seem plausible to me, but aren't memory pretty tightly integrated into the design in a modern processor? How would you be able to take advantage of the additional RAM?

Second question, do modems exist that could handle the bandwidth of existing designs?

It seems like something that would be extraordinarily expensive, and there wouldn't be much of a benefit considering Intel doesn't have competition on this front.


DRAM controllers used to be on the motherboard, not the CPU. That changed for AMD in 2003 and Intel in 2008, but it is not at all interwoven with the CPU core itself. Processors within the same product line with varying core counts use the exact same DRAM controller blocks. This is really obvious on the Intel server chips where the CPU cores are linked by a ring or mesh bus and the DRAM controllers are just another stop at the far edges of those interconnects.

Intel can update their DRAM controller independently of the CPU core microarchitecture, just like they can update the integrated GPU microarchitecture independently of the CPU core microarchitecture. The only reason why they might not be releasing a CPU with LPDDR4 yet is if they never expected to need an LPDDR4 controller before their 10nm process was ready, and never started designing a 14nm LPDDR4-capable controller. If so, that's a clear miscalculation on their part and a sign that the processor architects are probably insufficiently skeptical of what the fab guys are telling them.


That makes a lot of sense. Thanks for the explanation


Probably not trivial though, and I would not be surprised if many of these has already taped out and sampled. In general a modern DDR3/DDR4 memory controller is not a trivial thing to do.




Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: