I haven't simulated this to check but it may be the case that IO pins become a l... | Hacker News

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		bengesoff on April 7, 2016 \| parent \| context \| favorite \| on: RISC-V Offers Simple, Modular ISA I haven't simulated this to check but it may be the case that IO pins become a limiting factor. The Cyclone IV has 153 IO pins so the design would have to use less than ~15 to be able to fit 10 copies on.

Dylan16807 on April 7, 2016 [–]

Well a CPU doesn't inherently use any I/O pins so that shouldn't be a problem.

You can easily add some logic to let CPUs share pins, too.

bengesoff on April 7, 2016 | [–]

Good point sir

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