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When it comes to sensors and latency, you can use a 200mhz cortex m3 with a bespoke runtime you write in a couple weeks, or you can throw a real OS on top of multiple Ghz and cores in order to make up for the overhead of having a real OS.

SRAM running at 200mhz with 1 cycle latency can perform what looks like miracles when placed side by side with DRAM running at LOLWTF Ghz that is stuck behind 100 cycles of delay talking to the CPU that first tries to work its way through multiple steps of onboard cache and lookup buffers and all sorts of fun things.

Embedded controls can do stupid amazing things with very little resources because all of a sudden you have removed a huge constant delay from all memory accesses.

Throughput, however, they don't do so well on throughput. :-D



Yep. DRAM latency is no joke -- ask your fancy 32 core 5GHz super-duper-scaler CPU to chase a linked list and it turns back into one of those old beige boxes with the turbo button, but with the turbo button not pressed!


Linked lists and SRAM are so much fun.... All sorts of data structures that are cache and dram unfriendly are a-ok in embedded land.


If I remember correctly, pressing the turbo button actually slowed down the CPU clock.


Linked lists are fine. Trees with tagged pointers less so.




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