FWIW feature size doesn't really mean what it used to. Due to the 3d mesh manufacturing process, it's become a sort of shorthand for "equivalent in 2D." What really matters is transistor density, and different manufacturers differ wildly in how they relate transistor density to this "feature size in a 2D equivalent metric."
For instance, the M1 has a density of 171 million/sq mm and claims 5 nm 2D equivalent, while Willow Cove from IBM looks much worse at 10nm but its density is 100.
Saying this not to "cast shade" on certain chip fabricators, just saying that it doesn't actually mean that they have taken the same style transistor fab processes from ~10 years ago and shrunk them down to 5nm. I mean, by the time an actual 2D feature would reach ~2nm, we'd be talking about features that were only about 10 atoms across.
For instance, the M1 has a density of 171 million/sq mm and claims 5 nm 2D equivalent, while Willow Cove from IBM looks much worse at 10nm but its density is 100.
Saying this not to "cast shade" on certain chip fabricators, just saying that it doesn't actually mean that they have taken the same style transistor fab processes from ~10 years ago and shrunk them down to 5nm. I mean, by the time an actual 2D feature would reach ~2nm, we'd be talking about features that were only about 10 atoms across.